Jure Repinc@lemmy.mlEnglish · 17 hours agoOpen Letter: Open-Source Chips for Europeplus-squareopen-source-chips.euexternal-linkmessage-square0fedilinkarrow-up19arrow-down10
arrow-up19arrow-down1external-linkOpen Letter: Open-Source Chips for Europeplus-squareopen-source-chips.euJure Repinc@lemmy.mlEnglish · 17 hours agomessage-square0fedilink
schizoidman@lemm.eeEnglish · 22 days agoOrange Pi RV2 released as new RISC-V single-board computer with PCIe 2.0 and Gigabit Ethernet connectivityplus-squarewww.notebookcheck.netexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkOrange Pi RV2 released as new RISC-V single-board computer with PCIe 2.0 and Gigabit Ethernet connectivityplus-squarewww.notebookcheck.netschizoidman@lemm.eeEnglish · 22 days agomessage-square0fedilink
Alphane Moon@lemmy.worldEnglish · 26 days agoEurope bets on RISC-V for homegrown supercomputing platformplus-squarewww.theregister.comexternal-linkmessage-square0fedilinkarrow-up12arrow-down10
arrow-up12arrow-down1external-linkEurope bets on RISC-V for homegrown supercomputing platformplus-squarewww.theregister.comAlphane Moon@lemmy.worldEnglish · 26 days agomessage-square0fedilink
groche@lemmy.rochegmr.com · 27 days agonew orange pi with risc-vplus-squarewww.orangepi.orgexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linknew orange pi with risc-vplus-squarewww.orangepi.orggroche@lemmy.rochegmr.com · 27 days agomessage-square0fedilink
Alphane Moon@lemmy.world · 28 days agoAlibaba launches server-grade RISC-V CPU designplus-squarewww.theregister.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkAlibaba launches server-grade RISC-V CPU designplus-squarewww.theregister.comAlphane Moon@lemmy.world · 28 days agomessage-square0fedilink
Arthur Besse@lemmy.mlEnglish · 29 days agoChina to publish policy to boost RISC-V chip use nationwide, sources sayplus-squarewww.reuters.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkChina to publish policy to boost RISC-V chip use nationwide, sources sayplus-squarewww.reuters.comArthur Besse@lemmy.mlEnglish · 29 days agomessage-square0fedilink
schizoidman@lemm.eeEnglish · 29 days agoChina Reportedly Set to Roll Out Nationwide RISC-V Chip Push, with Policy Expected by March | TrendForce Newsplus-squarewww.trendforce.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkChina Reportedly Set to Roll Out Nationwide RISC-V Chip Push, with Policy Expected by March | TrendForce Newsplus-squarewww.trendforce.comschizoidman@lemm.eeEnglish · 29 days agomessage-square0fedilink
Wxnzxn@lemmy.ml · 1 month agoRISC-V and Open Hardware | Fedora Podcast 47plus-squarepeertube.wtfexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkRISC-V and Open Hardware | Fedora Podcast 47plus-squarepeertube.wtfWxnzxn@lemmy.ml · 1 month agomessage-square0fedilink
testman@lemmy.mlM · 1 month agoRISC-V was supposed to change everything — How's it going? (Jeff Geerling video)www.youtube.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkRISC-V was supposed to change everything — How's it going? (Jeff Geerling video)www.youtube.comtestman@lemmy.mlM · 1 month agomessage-square0fedilink
Alphane Moon@lemmy.world · 1 month agoSpacemiT MUSE Paper is a 10.95 inch RISC-V tablet that runs OpenHarmony OS - Liliputingplus-squareliliputing.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkSpacemiT MUSE Paper is a 10.95 inch RISC-V tablet that runs OpenHarmony OS - Liliputingplus-squareliliputing.comAlphane Moon@lemmy.world · 1 month agomessage-square0fedilink
Jure Repinc@lemmy.mlEnglish · 2 months agosmol-gpu: A tiny RISC-V GPU built to teach modern GPU architectureplus-squaregithub.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linksmol-gpu: A tiny RISC-V GPU built to teach modern GPU architectureplus-squaregithub.comJure Repinc@lemmy.mlEnglish · 2 months agomessage-square0fedilink
Arthur Besse@lemmy.ml · edit-22 months agoChina's SpacemiT develops "VitalStone V100" 64-core RISC-V datacenter CPU on 12nmplus-squarewww.tomshardware.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkChina's SpacemiT develops "VitalStone V100" 64-core RISC-V datacenter CPU on 12nmplus-squarewww.tomshardware.comArthur Besse@lemmy.ml · edit-22 months agomessage-square0fedilink
Jure Repinc@lemmy.mlEnglish · 2 months agoRISC-V Mainboard for Framework Laptop 13 is now availableplus-squareframe.workexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkRISC-V Mainboard for Framework Laptop 13 is now availableplus-squareframe.workJure Repinc@lemmy.mlEnglish · 2 months agomessage-square0fedilink
Jure Repinc@lemmy.mlEnglish · 2 months agoAlibaba/T-HEAD's Xuantie C910plus-squarechipsandcheese.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkAlibaba/T-HEAD's Xuantie C910plus-squarechipsandcheese.comJure Repinc@lemmy.mlEnglish · 2 months agomessage-square0fedilink
Jure Repinc@lemmy.mlEnglish · 2 months agoLinux running inside a PDF file via a RISC-V emulatorplus-squaregithub.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkLinux running inside a PDF file via a RISC-V emulatorplus-squaregithub.comJure Repinc@lemmy.mlEnglish · 2 months agomessage-square0fedilink
Jure Repinc@lemmy.mlEnglish · 2 months agoRISC-V developer room track schedule for FOSDEM 2025plus-squarefosdem.orgexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkRISC-V developer room track schedule for FOSDEM 2025plus-squarefosdem.orgJure Repinc@lemmy.mlEnglish · 2 months agomessage-square0fedilink
Jure Repinc@lemmy.mlEnglish · 2 months agoA RISC-V Progress Check: Benchmarking SiFive Performance P550 and T-HEAD Xuantie C910plus-squarechipsandcheese.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkA RISC-V Progress Check: Benchmarking SiFive Performance P550 and T-HEAD Xuantie C910plus-squarechipsandcheese.comJure Repinc@lemmy.mlEnglish · 2 months agomessage-square0fedilink
Jure Repinc@lemmy.mlEnglish · edit-22 months agoGeekbench 6.4 introduces support for RISC-V Vector Extensions (RVV)plus-squarewww.geekbench.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkGeekbench 6.4 introduces support for RISC-V Vector Extensions (RVV)plus-squarewww.geekbench.comJure Repinc@lemmy.mlEnglish · edit-22 months agomessage-square0fedilink
Jure Repinc@lemmy.mlEnglish · 2 months agoInside SiFive’s P550 Microarchitectureplus-squareold.chipsandcheese.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkInside SiFive’s P550 Microarchitectureplus-squareold.chipsandcheese.comJure Repinc@lemmy.mlEnglish · 2 months agomessage-square0fedilink
testman@lemmy.mlM · edit-22 months agoWhy RISC-V Matters - ExplainingComputersplus-squarefarside.linkexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkWhy RISC-V Matters - ExplainingComputersplus-squarefarside.linktestman@lemmy.mlM · edit-22 months agomessage-square0fedilink
